1. Field of the Invention
The invention relates in general to the fabrication of an integrated circuit (IC) device, and more particularly to a method of fabricating a shallow trench isolation (STI) structure, preventing the occurrence of kink effect.
2. Description of the Related Art
An IC device is usually composed of millions of metal-oxide semiconductor field effect transistors (MOSFET). For example, a dynamic random access memory (DRAM) is a typical IC device with high dense. Therefore, isolation structures of a high integration IC device are now of great interest since inferior isolation structures may cause short circuit between adjacent transistors. One of the most common used isolation structures is local oxidation (LOCOS), which is an isolation technique by forming thick field oxide extending an the substrate surface. The LOCOS technique is now a mature process with high reliability and efficiency. However, there are still several drawbacks of LOCOS, including stress, consequential problems due to stress and the formation of bird's beak. In particular, the problems resulted from bird's beak cause ineffective isolation. Therefore, a newly developed isolation structure, shallow trench isolation (STI) structure, becomes more popular.
A typical STI process is described as followed. Referring to FIG. 1A, a pad oxide layer and a silicon nitride layer are successively formed on a substrate 100, using thermal oxidation and chemical vapor deposition (CVD), respectively.
Next, after spin coating a photoresist layer, the wafer is processed through photolithography and etching to define the STI regions. The defining processes includes: covering a photresist layer over the wafer, patterning the photoresist layer by exposure and development, using the patterned photo resist layer 106 as a mask to etch to form a patterned pad oxide layer 102, a patterned silicon nitride layer 104, a patterned oxide layer 112 and a shallow trenches 107 down to the substrate.
Referring to FIG. 1B, after removing the photoresist layer 106, a liner oxide layer 110 is formed on the inner surface 101 of the shallow trench 107 by thermal oxidation. A further oxide layer 108 is deposited in the trenches 107 by atmosphere pressure chemical vapor deposition (APCVD) and then processed through densification.
Referring to FIG. 1C, the CVD oxide layer 108 and the oxide layer 112 are processed through chemical mechanical polishing (CMP), in the existence of slurry. The CMP is continuously performed until exposing the silicon nitride layer 104 to form an even CVD oxide layer 108a.
Referring to FIG. 1D, the silicon nitride layer 104 is first removed by hot phosphoric acid and then the pad oxide layer 102 is removed by hydrofluoric acid. However, the hydrofluoric acid may also erode the corner of the even oxide layer 108a and damage the oxide layer 108b. Therefore, a recesses 111 is formed.
Referring to FIG. 1D, charge accumulation tends to occur at the recesses 111 and consequently sub-threshold leakage current usually comes out, which is so-called kink effect. The abnormal kink effect reduces the quality of the devices, and also reduces the yield, which is undesired.